Computer architectures generally include a plurality of separate devices such as processors, memories, and peripheral devices, interconnected by one or more buses. For example, modern computer systems, such as servers, workstations or personal computers (PCS), may include at least a processor, a host memory (typically high-speed dynamic RAM), and a host cache (high-speed static RAM). A local bus such as an Intel x86-type bus may provide a link between the processor, the host memory, and the host cache. As opposed to the local bus, system buses may be used as an interconnect transportation mechanism to transport data between highly integrated peripheral devices, peripheral add-in boards and processor/memory subsystems. One example of system buses used for high speed transfer in servers, workstations, and personal computers is a Peripheral Component Interconnect (PCI) bus. The PCI bus is a high performance 32 or 64 bit synchronous bus with automatic configurability and multiplexed address, control and data lines as described in the latest version of "PCI Local Bus Specification, Revision 2.1" set forth by the PCI Special Interest Group (SIG) on Jun. 1, 1995. Currently, the PCI architecture provides the most common method used to extend computer systems for add-on arrangements (e.g., expansion cards) with new video, networking, or disk memory storage capabilities.
When a PCI bus is used as an interconnect transportation mechanism in a host system (e.g., personal computer or server), data transfer between, a processor, input/output (I/O) devices, system memory and I/O device is executed at high speed. However, a PCI bus is often a common cause of errors and/or crashing a host system. Many common failures of PCI bus are caused in conjunction with the process of adding or removing add-on adapter cards from the host system which may disrupt an existing electrical connection or form an incomplete new electrical connection, or which may alter the air flow and cooling characteristics inside the host system, or with a new adapter card which may not be well-behaved, and may have driving signals active at inappropriate times. Such failure may compromise the integrity of the host system. Any misbehaved agent on the PCI bus, for example, mayb spuriously drive the PCI reset signal, the PCI clock signal, or any of other PCI signals at any time, possibly causing a host system crash. Consequently, monitoring the PCI bus for correct operation in a host system is desirable. One approach to monitoring the PCI bus operation is to use standard electronic instruments such as PCI bus analyzers or laboratory analysis and diagnostic tools. An example of a PCI bus analyzer used for analyzing a PCI bus operation in a host computer on test bench in laboratory environment as shown in FIG. 1. The PCI bus analyzer 20 is coupled to a PCI bus 13 of a host system 11 by way of a cable 12 and a PCI bus analyzer card 10, and operates in conjunction with an analysis software (installed in PCI bus analyzer 20) for probing the PCI bus 13 to measure and display the PCI bus operation. The PCI bus analyzer 20 may be connected to an add-on card 10 for insertion directly onto a PCI bus 13 to analyze the overall performance of the PCI bus 13. Unfortunately, standard electronic instruments including PCI bus analyzers are neither designed for communications over a computer network, nor designed for continuously tracking and reporting PCI bus events in a host system while it is operating in a normal office or home environment. Moreover, standard electronic instruments are cumbersome to use and often require the attachment of test probes to the PCI bus whose activity is being monitored. Further, standard electronic instruments are dependent on power and clock signals of the PCI bus on which they operate, and thus may be adversely affected by anomalies/failures of such power or clock signals.
Further, such standard electronic instruments reset responsive to a global reset anomalies/failures, and being unable to monitor bus operation during the reset time.